Nop Slide

Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. In computer CPUs, a NOP slide, NOP sled or NOP ramp, is a sequence of NOP (no-operation) instructions (on Intel x86, this is the opcode 0x90) meant to "slide" the CPU's instruction execution flow to its final, desired, destination. Generally a NOP slide will be used in cases where execution will branch into a position that cannot be determined with absolute accuracy, therefore "padding" the memory area before and after the approximate branch address is performed in the hope of avoiding an exception which would cause the program or system to crash. Once the CPU branches anywhere within the NOP slide, its IP (instruction pointer) will "slide" to its final destination, where there is valid code to be executed.