Photonic Computing Architectures for Accelerated Artificial Intelligence: A Post-Silicon Paradigm Energy-Efficient Neural Network Processing

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Bol The exponential growth of artificial intelligence workloads has created an unsustainable trajectory in computational energy consumption, while the deceleration of Moore's Law and breakdown of Dennard scaling constrain electronic hardware from meeting this demand. This dissertation investigates photonic computing as a post-silicon paradigm for energy-efficient neural network processing, evaluating three architectures-Mach-Zehnder interferometer (MZI) mesh processors, micro-ring resonator (MRR) weight banks, and phase-change material (PCM) tensor cores-through a three-phase mixed-methods design. Phase 1 benchmarked four photonic against four electronic AI accelerators, revealing a median energy efficiency advantage of 2.36× (5.19 vs. 2.20 TOPS/W) with a large effect size (Cohen's d = 0.76) and directional support from 89.8% of 10,000 bootstrap resamples. Statistical significance was not achieved (p = .354) owing to 14.9% power in the near-census sample (n = 4 per group), consistent with a Type II error. Phase 2 modeled architectural barriers: silicon MRRs exhibited thermal drift of 100 pm/°C, MZI processors lost >60% accuracy at ±3°C deviation, 64×64 meshes required phase error tolerances of σ

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The exponential growth of artificial intelligence workloads has created an unsustainable trajectory in computational energy consumption, while the deceleration of Moore's Law and breakdown of Dennard scaling constrain electronic hardware from meeting this demand. This dissertation investigates photonic computing as a post-silicon paradigm for energy-efficient neural network processing, evaluating three architectures-Mach-Zehnder interferometer (MZI) mesh processors, micro-ring resonator (MRR) weight banks, and phase-change material (PCM) tensor cores-through a three-phase mixed-methods design. Phase 1 benchmarked four photonic against four electronic AI accelerators, revealing a median energy efficiency advantage of 2.36× (5.19 vs. 2.20 TOPS/W) with a large effect size (Cohen's d = 0.76) and directional support from 89.8% of 10,000 bootstrap resamples. Statistical significance was not achieved (p = .354) owing to 14.9% power in the near-census sample (n = 4 per group), consistent with a Type II error. Phase 2 modeled architectural barriers: silicon MRRs exhibited thermal drift of 100 pm/°C, MZI processors lost >60% accuracy at ±3°C deviation, 64×64 meshes required phase error tolerances of σ


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